Lam Research — When Etch and Deposition Intensity Is the Revenue
Inside the structural beneficiary of the $140B wafer fab equipment (WFE) cycle, where chip verticalization raises the number of etch and deposition steps per wafer non-linearly. It is the highest beta to the AI memory supercycle transitioning into equipment orders
Lam Research is the etch-and-deposition equipment maker most directly capturing the equipment-stage transition of the AI cycle, and the structural tailwind of technical intensity (stacking and verticalization) sits on top of the cycle, distinguishing it from a pure cyclical bet. Five straight quarters of growth and record guidance, an upward-biased $140B WFE view, and the early execution of a ~$40B NAND conversion all point fundamentals in one direction. We agree it is an investable company, but the roughly 86% year-to-date move makes entry conditional and staged.
Reader's Brief — 30-second TL;DR
Advanced
Why Now
Further upward revisions to the $140B WFE view, additional pull-forward of NAND conversion investment, advanced packaging growth above 50%, and a rebound in customer deferred revenue are the key upside triggers. The first variable to break is customer deferred revenue, now at its lowest in about four years, alongside expanded China export controls and a 2027 WFE contraction on softening memory prices. The June-quarter print in late July is the first verification window.
Winners ?? Losers
Beneficiaries: Lam Research (the standard in memory high-aspect-ratio etch and the highest beta to the memory cycle), and the early NAND conversion. Non-competing co-beneficiaries: ASML (EUV monopoly, whose bookings lead Lam's demand), KLA (inspection and metrology oligopoly). Direct competition: Applied Materials (deposition rival, contesting the logic-etch dividing line), Tokyo Electron (third in etch). Pressure variables: accelerated localization by Chinese tool makers (NAURA, AMEC) and a reversal in memory prices.
1. Company Overview and the Two Processes — From a Single Etch Well to a Deposition Duopoly
Lam Research was founded in Silicon Valley in 1980 as a single-focus plasma-etch equipment company. It later expanded into deposition (through the Novellus Systems merger) to become one of the few makers holding both the etch and deposition axes. Headquartered in Fremont, California, it is led by CEO Tim Archer and CFO Doug Bettinger. The company's history has tracked the verticalization of the memory industry. It cemented its standard-supplier status in high-aspect-ratio etch when 2D NAND transitioned to 3D in the mid-2010s, a lineage that now extends into cryogenic etch for the 400-layer era. In October 2024 it executed a 10-for-1 stock split, leaving about 1,255 million shares outstanding.
Its financial profile is among the best in the equipment sector—a gross margin around 50%, an operating margin in the mid-30s, capex at 4–5% of revenue (an asset-light structure), and steady return of free cash flow via buybacks and dividends. Its customer base spans the entire chipmaking industry: Samsung, SK Hynix, Micron, and Kioxia in memory, and TSMC, Intel, and Chinese local foundries in foundry and logic. A revenue mix relatively heavy on memory is the source of this stock's beta.
and Deposition — Carving and Stacking the Chip
Semiconductor front-end processing is a repetition of hundreds to thousands of steps that build circuits on a wafer, with three core motions: drawing patterns with light (lithography, ASML's domain), laying down material in thin layers (deposition), and carving away what is not needed (etch). Lam specializes in the carving and stacking motions. Deposition lays uniform films a few nanometers thick, with chemical vapor deposition (CVD) and atomic layer deposition (ALD), one atomic layer at a time, as the representatives. selectively removes specific material with plasma, and high-aspect-ratio etch—drilling deep, narrow holes vertically—is the apex of difficulty.
The reason both processes grow in weight as chips move from planar (2D) to three-dimensional (3D) lies in geometry. Planar scaling is a lithography fight over drawing patterns finer; verticalization is a fight to stack hundreds of layers (deposition) and pierce those hundreds of layers in one shot (etch). 3D NAND at 400 layers, die stacking, the three-dimensional channel of the GAA transistor, and through-silicon vias (TSV) in advanced packaging all fall into this category. So the verticalization of the industry is a structural rise in the etch-and-deposition share of equipment spending—the proposition that runs through this entire report.
A company that competed for more than 40 years on the depth of a single etch process now meets an era in which that process sits at the center of manufacturing difficulty thanks to chip verticalization. The company's history is itself half the thesis.
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This report is provided for informational purposes only and does not constitute a recommendation to buy or sell any financial instrument. Investment decisions should be made based on your own judgment and responsibility. The analysis and opinions contained herein are based on information available at the time of writing and are subject to change.